1. Field of Invention
The present invention relates to a three-dimensional mounting type of semiconductor device and a method for manufacturing the same.
2. Description of Related Art
In recent years, three-dimensional mounting type semiconductor devices, in which a plurality of semiconductor devices are stacked in layers, have been developed. Conventionally, the three-dimensional mounting type semiconductor devices include those in which semiconductor chips, that have been individually cut from semiconductor wafers, are stacked in layers, or those in which semiconductor wafers having chip-forming sections are bonded together and then cut into individual segments.
However, in the former case in which semiconductor chips that have been individually cut from semiconductor wafers are stacked in layers, for example, positional alignment of the base semiconductor chips or the like is required, whereby the number of process steps is unavoidably increased.
Also, in the latter case in which semiconductor wafers having chip-forming sections are bonded together and then cut into individual segments, the semiconductor wafers to be bonded may include bad semiconductor chip forming sections. Even though locations of the bad semiconductor chip forming sections can be determined, it is unavoidable that the bad semiconductor chip forming sections are bonded because the semiconductor wafers are bonded together. Accordingly, after the semiconductor chip forming sections are bonded together and cut into individual segments, the bad products must be separated from the good products. When the bad semiconductor chip forming sections are present in one of the semiconductor wafers to be bonded, bonded segments become bad products, and therefore the yield is unavoidably deteriorated.
It is therefore an object of the present invention to simplify the manufacturing process and increase the yield.
A method for manufacturing a semiconductor device in accordance with a first aspect of the invention includes the steps of: preparing a semiconductor wafer equipped with a plurality of semiconductor chip forming sections; conducting an electrical characteristic examination for each of the semiconductor chip forming sections to determine good product sections or bad product sections; and electrically connecting at least another segmented semiconductor chip to each of the semiconductor chip forming sections that are determined to be good product sections.
In the invention described above, another segmented semiconductor chip is electrically connected only to each of the semiconductor chip forming sections that are determined to be good product sections. Therefore, other segmented semiconductor chips are not stacked in layers on bad semiconductor chip forming sections, which reduces waste and increases the yield. Also, since the other segmented semiconductor chips are stacked in layers on the semiconductor wafer before the semiconductor chip forming sections thereof are cut into segments, the manufacturing process is simplified.
In the method for manufacturing a semiconductor device in accordance with a second aspect of the present invention, the segmented semiconductor chip of the first aspect, that has been previously subject to an electrical characteristic examination and determined to be a good product, is used.
In the method for manufacturing a semiconductor device in accordance with a third aspect of the present invention, an electrical connection between at least another segmented semiconductor chip and each of the semiconductor chip forming sections that are determined to be good product sections in the first and second aspects may be conducted by wire bonding.
In the method for manufacturing a semiconductor device in accordance with a forth aspect of the present invention, an electrical connection between at least another segmented semiconductor chip and each of the semiconductor chip forming sections that are determined to be good product sections in the first and second aspects may be conducted by face-down bonding.
In the method for manufacturing a semiconductor device in accordance with a fifth aspect of the present invention, when electrically connecting another segmented semiconductor chip to each of the semiconductor chip forming sections that are determined to be good product sections in the first and second aspects, two or more other segmented semiconductor chips may be prepared, the electrical connection of the at least another segmented semiconductor chip may be conducted by wire bonding, and the electrical connection of the other remaining segmented semiconductor chips may be conducted by face-down bonding.
The method for manufacturing a semiconductor device in accordance with a sixth aspect of the present invention may include, after electrically connecting the segmented other semiconductor chips to the respective semiconductor chip forming sections in the third through fifth aspects, the step of protecting at least connecting sections between the other segmented semiconductor chips and the respective semiconductor chip forming sections with a resin mold.
The method for manufacturing a semiconductor device in accordance with a seventh aspect of the present invention may include the step of cutting the semiconductor wafer in which the segmented semiconductor chips are electrically connected in the first through sixth aspects into segments for the respective semiconductor chip forming sections.
A method for manufacturing a semiconductor device in accordance with an eighth aspect of the present invention includes the steps of: preparing a semiconductor wafer equipped with a plurality of semiconductor chip forming sections having electrodes; forming a through hole in each of the semiconductor chip forming sections, and forming a conduction layer that extends via the through hole, from at least one surface of the semiconductor chip forming sections on which the electrodes are formed, to the other surface opposing to the one surface; conducting an electrical characteristic examination for each of the semiconductor chip forming sections to determine good product sections or bad product sections; and electrically connecting at least another segmented semiconductor chip to each of the semiconductor chip forming sections that are determined to be good product sections.
In the embodiment of the eighth aspect, in the semiconductor wafer having a conduction layer formed to extend from at least one surface of the semiconductor chip forming sections on which the electrodes are formed to the other surface opposing to the one surface, other segmented semiconductor chips are stacked in layers on and electrically connected to only the semiconductor chip forming sections that are determined to be good product sections. As a result, a high electrical reliability is attained, the other segmented semiconductor chips are not stacked in layers on bad semiconductor chip forming sections, such waste is reduced and the yield is increased. Also, since the other segmented semiconductor chips are stacked in layers on the semiconductor wafer before the semiconductor chip forming sections thereof are cut into segments, the manufacturing process is simplified.
In the method for manufacturing a semiconductor device in accordance with a ninth aspect of the present invention, the segmented semiconductor chip in the eighth aspect, that has been previously subject to an electrical characteristic examination and determined as a good product, is used.
In the method for manufacturing a semiconductor device in accordance with a tenth aspect of the present invention, an electrical connection between at least another segmented semiconductor chip and each of the semiconductor chip forming sections that are determined to be good product sections in the eighth and ninth aspects may be conducted by wire bonding.
In the method for manufacturing a semiconductor device in accordance with an eleventh aspect of the present invention, an electrical connection between at least another segmented semiconductor chip and each of the semiconductor chip forming sections that are determined to be good product sections in the eighth and ninth aspects may be conducted by face-down bonding.
In the method for manufacturing a semiconductor device in accordance with a twelfth aspect of the present invention, when electrically connecting another segmented semiconductor chip to each of the semiconductor chip forming sections that are determined to be good product sections in the eighth and ninth aspects, two or more other segmented semiconductor chips may be prepared, the electrical connection of the at least another segmented semiconductor chip may be conducted by wire bonding, and the electrical connection of the other remaining segmented semiconductor chips may be conducted by face-down bonding.
The method for manufacturing a semiconductor device in accordance with a thirteenth aspect of the present invention may include, after electrically connecting the segmented other semiconductor chips to the respective semiconductor chip forming sections in the tenth through twelfth aspects, the step of protecting at least connecting sections between the other segmented semiconductor chips and the respective semiconductor chip forming sections with a resin mold.
The method for manufacturing a semiconductor device in accordance with a fourteenth aspect of the present invention may include the step of cutting the semiconductor wafer in which the segmented semiconductor chips are electrically connected in the eighth through thirteenth aspects into segments for the respective semiconductor chip forming sections.
In the method for manufacturing a semiconductor device in accordance with a fifteenth aspect of the present invention, after a stress relieving layer is formed on at least one surface of the semiconductor chip forming sections in the eighth through fourteenth aspects, the conduction layer may be formed over the stress-relieving layers.
In the method for manufacturing a semiconductor device in accordance with a sixteenth aspect of the present invention, external electrodes may be formed on the conduction layers in the semiconductor chip forming sections in the eighth through fourteenth aspects.
A semiconductor device in accordance with a seventeenth aspect of the present invention includes a semiconductor wafer equipped with a plurality of semiconductor chip forming sections has at least one of the semiconductor chip forming sections being electrically connected to at least another segmented semiconductor chip.
In the semiconductor device in accordance with an eighteenth aspect of the present invention, the semiconductor chip forming section being electrically connected to the another segmented semiconductor chip in the semiconductor wafer in the seventeenth aspect has previously been subject to an electrical characteristic examination and determined as a good product.
In the seventeenth and eighteenth aspects, other segmented semiconductor chips are stacked in layers only on and electrically connected only to the semiconductor chip forming sections that have previously been subject to an electrical characteristic examination and determined as good products. As a result, other segmented semiconductor chips are not stacked in layers on bad semiconductor chip forming sections, such that waste is reduced and the yield is increased.
A semiconductor device in accordance with a nineteenth aspect of the present invention includes a semiconductor wafer equipped with a plurality of semiconductor chip forming sections having electrodes, a through hole is defined by each of the semiconductor chip forming sections, and a conduction layer extends via the through hole from at least one surface of the semiconductor chip forming sections, on which the electrodes are formed, to the other surface opposing the one surface. At least another segmented semiconductor chip is electrically connected to each of the semiconductor chip forming sections of the semiconductor wafer.
In the semiconductor device in accordance with a twentieth aspect of the present invention, the other segmented semiconductor chip in the nineteenth aspect may be electrically connected to the semiconductor chip forming section through the conduction layer.